Questions tagged [i2c]

I²C (Inter-Integrated Circuit) is a multi-drop serial bus invented by Philips (now NXP) for communication between ICs on the same PCB, i.e. short distance.

I2C uses a 2-wire bus to communicate between a bus master and 1 or more slave devices. The master is a microcontroller, the slave devices are often microcontroller peripherals, but can also be an other microcontroller. Typical slave devices include:

  • EEPROMs
  • RTCs (Real Time Clocks)
  • Temperature sensors
  • GPIO expanders

Protocol
Communication goes over two wires: SDA (data) and SCL (clock). The lines are pull-up to high level by resistors, and the devices can make them low level with an open-drain NFET. Communication is initiated by a master which sends a start condition:

enter image description here

Start and stop conditions are easily detectable; they're the only situations where SDA can change while SCL is high. All other SDA changes should take place while SCL is low.

The master then sends the slave's 7-bit address followed by a R/W bit. After 8 bits have been received the slave replies with an ACK by pulling SDA low, which is read by the master at the 9th clock pulse. Successive bytes may be written by the master or the slave as the master clock SCL. Each byte is to be acknowledged by the slave. The communication ends with the stop condition: SDA going high while SCL is high.

enter image description here

Addressing
An I2C address is 7 bits long. Many devices have the highest bits of their address fixed, while the lowest bits can be selected using 1 or more inputs on the IC. The LM75B for instance has the address range 1001xxx2, where the 3 least significant bits can be set via 3 inputs on the device. This allows for up to 8 LM75Bs sharing the same I2C bus.

Further reading

I2C Specification at NXP
I2C Manual at NXP
I2C Interface Solutions, NXP presentation
I2C info at www.i2c-bus.org

I2C pull-up resistors

EDN article Design calculations for robust I2C communications
Is there a correct resistance value for I2C pull-up resistors?
TI application note I2C Bus Pullup Resistor Calculation

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Maximum I2C Bus Length?

What is the maximum length of cable that could be used to connect two I2C devices (I2C master-> I2C slave)? Yes, I know that I2C is really designed for intra-board communication. I have been tasked with a "design goal" of using a common I2C bus for…
Nate
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What is the difference between I2C and TWI?

What is the difference between the I2C and TWI interfaces? Wikipedia says that TWI is variant of I2C. Some other sources says that only name is different.
user54579
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What I2C address should I choose?

Now I know in order to have an I2C address reserved for yourself you have to pay the I2C people some money. But I don't want to do this. I'm asking for advice on what address I should choose for my slave and master MCUs on my project. There will…
Thomas O
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How many i2c slaves can a i2c master support?

Is there a maximum number of i2c slaves that a i2c master can drive? What are the physical limiting factors?
user768421
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Why the need for multiple I²C ports?

The I²C protocol allows, in theory and with 7-bit addressing, up to 127 devices to be connected to the master. This is a large number, so why would any low-cost microcontroller (e.g. this PIC24), have more than one I²C port? Why is it needed?
student1
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Is I2C mixed frequency possible?

Suppose we have a 400 kHz I2C bus. There is one master and a bunch of slave devices. We would like to introduce one more slave device, but unfortunately it only goes to 100 kHz . Clearly, the solid design choices are: just run that bus at 100 kHz…
Kaz
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How should I optimize I2C communication over a 10 to 25 meter cable?

I'm connecting a Sparkfun Artemis Redboard to a SCD41 CO2 sensor via a TCA9548A I2C multiplexer. There are 6 sensors connected to the multiplexer with long cables, so ideally the solution complexity won't scale with the number of sensors. This is…
Vulcan
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Open drain concept in I2C bus?

(I am mainly from a software background and just started to work on an embedded platform. Excuse me if this is a naive question...) I am planning to write a driver for an EEPROM which is connected to the MCU via an I2C bus. So I am reading a…
smwikipedia
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I2C read/write failure under heavy interrupt load

In my system, I am using I2C and I realize under heavy interrupt load (from other sources), I2C communication is easily disrupted. Is this expected behavior for I2C? I would have expected despite interrupt load, it would still be ok since I2C is not…
Ktc
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I2C short pulse during SCL==low

Somewhere around the end of transmitting a byte in Master Transmit mode the following is observed(SCL - yellow, SDA - blue). I am mainly interested in What is the tiny pulse on the right? STOP? START? ACK? glitch? But those clarifications would…
Vorac
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In I2C communication, slave not able to pull down properly during 9th clock pulse (not giving proper ack)

I am trying to communicate from master to slave using I2C communication. But during the 9th clock cycle, the slave is trying to pull high to low but it can only pull it down to half the voltage (3.3 V to 1.3 V). I changed the pull-up from 10 kΩ to…
spani
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Which microcontroller should be master / slave?

I'm design an alarm to wake me up the morning. The system is composed of 3 subsystems : (S1) RGB seven segments management. Composed of 5µCs, one for each digit and one for ":". The high number of µC is due to the fact that I don't use IC for RGB…
M.Ferru
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How is the clock frequency established between master and slave in I2C protocol?

This is a follow-up question to What happens if I omit the pullup resistors on I2C lines? In a digital wall clock I designed (using the DS1307 RTC and the ATmega328 MCU), I accidentally omitted the pull-up resistors that must be wired to both I2C…
Ricardo
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Can I directly interface to 5V I2C devices with an STM32 running on 1.8V?

STM32 I/O pins are 5V-tolerant. I2C devices use open-drain outputs. I currently see no problem with operating an I2C bus with 5V devices from a 1.8V STM32 (with pullups to 5V). Is my understanding correct?
cksa361
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At what edge of the clock, SDA signal is sampled in I2C for data? At rising edge / falling edge / after rising edge?

I found this from wikipedia page. It says, data is sampled after SCL line rises.
Lelouch Yagami
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