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For PLL chips, digikey notes the "Ratio - Input:Output". For example, here are two 74HCT4046 ICs:

  • This TI chip has a "Ratio - Input:Output" of "1:4"
  • This NXP chip has a "Ratio - Input:Output" of "2:3"

What does this "Ratio - Input:Output" mean?

Why does it vary for different 74HCT4046 ICs? Are not all 74HCT4046 made (more or less) equal?

I've searched both datasheets for the term (or a similar one), and I can't find any explanation. The word "ratio" doesn't appear at all in the TI datasheet. "Ratio" does show up in the NXP datasheet, but it seems to be in a different context.

lnmaurer
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2 Answers2

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The Digikey summary table is a generic list trying to show all things to all men. Just ignore it and read the data sheet. Do not rely on it. Same with Farnell - they have a table/list for each component they list - go straight to the data sheet unless its the very basic info you're after.

Andy aka
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The input/output frequency ratio of a PLL is set by frequency dividers in the reference and feedback paths.

In the NXP datasheet, these are shown as a "Divide by 10" block in the reference path and a "Programmable Divider" in the feedback path in Fig. 32. As far as I can tell from briefly reading the datasheets, these are external components that the user is meant to supply, not internal blocks in the HC[T]4046 chip. So there is no set frequency multiplication ratio for this chip --- it's determined by these external components.

It's not clear why Digikey includes this spec in their listing of these parts. I would ignore it if its not backed up by the manufacturer's datasheets. Its the datasheet from the manufacturer that describes what the part really does. Anything the distributor tells you about the part is just meant for convenience (or maybe to add confusion).

The Photon
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