I have seen much info explaining that the inputs of unused gates in a multi-gate IC (say, 74LS00, which is a quad-gate, where only 3 gates are used) should not be left floating, but I cannot find any technical reason as to why this is the case.
The datasheets specify that the quad gates are "independent" or "isolated," and the schematic shown in the datasheets for simple gates clearly show 4 independent gates.
I understand that it's not exactly the case, as clearly VCC and GND pins power the entire IC. I am interested in the technical reason, and perhaps an experiment that can be setup to clearly show that an unused gate is problematic if left floating.
The closest I've seen to my question is this one, but none of the answers address what I'm asking.