Function of pll?

Question

What is the relationship between input phase and output phase of a pll(phase locked loop)?

Why is it called phase locked? Does it keeps/locks output phase to phase of input meaning output has same phase as input?

This reads like a homework question. What have you tried so far? — BB ON, Nov 04 '19 at 18:13
As much as we would like to say we have god-like insight into everything, we can't verify whether homework questions are indeed homework. Which is why the necessary condition is that they sound like one, not that they are one. — BB ON, Nov 04 '19 at 18:35

score 4 · Answer 1 · answered Nov 04 '19 at 18:36

4

"Phase locked" means that the fundamental feedback mechanism is comparing the phase of the output with the phase of the reference signal, maintaining a constant relationship between them.

The phase offset is not necessarily zero — it depends on the design of the phase detector. Some enforce an offset of 90° or 180°.

answered Nov 04 '19 at 18:36

Dave Tweed

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How it maintains a constant relationship between phase of output and phase of refrence?by using any controller? – DSP_CS Nov 05 '19 at 07:37
What do you mean by constant relationship? Does you mean that it tries to keep phase of output same as input refrence ? Or you mean something else by constant relationship? – DSP_CS Nov 05 '19 at 07:39
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maybe more accurate would be to say "constant difference", i.e. the difference of phases is constant (this constant might be 0° but not neccessarily) – Curd Nov 05 '19 at 10:49

score 1 · Answer 2 · answered Nov 05 '19 at 03:28

Following up on Dave Tweed answer, the PLL will have leakage currents, thus the UP and the Down pulses will be imbalanced to correct for the leakages.

Leakage currents, such as base-currents into NPN bipolar integrators to compare the UP with Down pulses, will cause large Reference Frequency spurs.

When I diagnosed this, I changed to a Darlington integrator.

Function of pll?

2 Answers2