I am trying to understand the clock construction given in this paper, to embed a circuit to a Hamiltonian, which doesn't need to access a separate clock register.
The construction, at a high level, comprises of using a complicated sequence of flag qubits and other machinery to "guide" the computation across the 1D line. I am very confused about how the computation is being guided. As a reference, this diagram is provided (Figure $1$):
I am very confused about whether the gates we are applying are one or two qubit gates and how exactly we are apply these gates. I am also confused about why the computation after going from left to right, suddenly "turns" back (from steps $4$ onwards).
If someone could provide a detailed explanation of the entire construction, that would be very helpful!
