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I have this circuit for which I have to find the truth table for all imputs whether they are logic 1 (VDD), logic 0 (GROUND) or X unknown. But I am having trouble understanding what I am supposed to do to find the OUTPUT when the imput is unknown..

cmos circuit

System
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  • I think you mean "don't care" as apposed to "unknown". Either clarify or fix, but as it stands now this question makes little sense. – Olin Lathrop Oct 20 '13 at 12:56
  • In standard 4 valued logic systems like in Verilog and VHDL there is 1,0,Z, X with X = Unknown. VHDL takes it further with weak and driven unknowns. A X can map to a "don't care" but not always. "Don't care" is a subset of unknown. – placeholder Oct 20 '13 at 13:15
  • that is how I understood it as well. Meaning that X could be something below the threshold voltage, above it or in the Pmos case above the Vdd-|Vthreshold| which is my problem. – System Oct 20 '13 at 17:50

2 Answers2

1

You simply need to break it down moving from the output to the input.

C = 1: Out = floating (i.e. X) unless the node on the inverter is driven low.

C= 0: Out = 0 unless the PMOS on the inverter has strength enough to drive the NMOS (with /C on it), but since this is driven through another NMOS (with C on it) it's hard to tell.

This question as posed needs transistor sizing information to be of any value at all.

placeholder
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0

The way to approach this problem is to tackle ON/OFF states of devices for all combinations of boolean inputs A, B and C. You can label the transmission gate, PMOS, NMOS transistors. Make a truth table with A,B,C as inputs and outputs as state(ON/OFF) of individual devices plus Out. You will find that Out is either connected to Vdd (HIGH) or ground (Vss i.e. Low) and is never floating(open circuit or High-impedance).

Out is High only for two combinations: A=0, B=1, C=1; A=1, B=1, C=1. For all other combinations, Out is always connected to ground(Vss)

nurabha
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