What is the general rule of thumb to convert SR (NOR) latch into S'R' (NAND) latch? I only know the two inputs (S,R) need to be inverted. What about outputs (Q)?
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                    Please clarify your specific problem or provide additional details to highlight exactly what you need. As it's currently written, it's hard to tell exactly what you're asking. – Community Jan 22 '24 at 17:26
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                    Your question has very little information to work with. Please describe, or summarize in a truth table, the actions of the flipflop for all 16 input state conditions. Also, the schematic is so small that it is difficult yo tell if crossed nets are connected with dots or not. A larger image would help, bot also you can break up any 4-2aw connection into two T connections. – AnalogKid Jan 22 '24 at 17:34
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                    Sorry if my question is confusing. The function of this circuit is complicated and hard to illustrate with a simple truth table. I am looking for a general rule of thumb to convert a NOR SR latch to NAND SR latch. For example, inputs need to be inverted. Outputs need to be swapped (I make it up, I don't know yet). Circuit here is for reference. – VvOoGame Jan 22 '24 at 17:38
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                    Please update your question with a link to the original circuit you found. Also, there are four input converters. Which two are you referring to? – AnalogKid Jan 22 '24 at 17:42
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                    Hi AnalogKid, I am referring to the inputs of SR latch which are basically S and R, not the input of this circuit. I found this circuit on a Chinese website that you don't want to open. – VvOoGame Jan 22 '24 at 17:45
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                    @VvOoGame - As you have now removed the copied schematic from your question, the requirement to reference it cannot sensibly apply now. Therefore I removed my earlier comment. However please note that rule for future posts. || FYI the main site rules here are shown in the [tour] & [help] and some of them differ from typical forums. – SamGibson Jan 22 '24 at 18:01
1 Answers
For normal operation, the conversion is as you describe. A NOR ff has positive-true logic action (a high level asserts the output) and a NAND ff has negative-true inputs. In terms of input action, one inverter at each input effects the conversion.
And you are correct about the outputs. Swapping them restores which output will go high when an input (before the added input inverter) goes high.
What changes is what happens when both inputs are true. With a NOR ff, both outputs are low; with a NAND ff, both outputs are high. If you want the NAND circuit to behave like the NOT circuit in this state, then do not swap the outputs, and add an inverter to each one. Now you have completed the DeMorgan transformation of the circuit.
https://en.wikipedia.org/wiki/De_Morgan%27s_laws#Engineering
https://en.wikipedia.org/wiki/De_Morgan%27s_laws#Generalising_De_Morgan_duality
 
    
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