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I'm (ab)using a 74HC590 binary counter as a 2-bit counter. The storage register clock is directly connected to the counter clock. I'm feeding the inverted 4th bit (bit 3) of the counter into ~MRC (master reset).

This works in principle, but state 0 lasts for two clock pulses. I am working on an existing PCB, so I am looking for a minimal fix, if there is one.

I could OR the common clock input with the non-inverted 4th bit to bump the storage clock by one, but that would not last, I suppose.

I guess I should ask a general question of perhaps more interest: what would be the recommended way of setting the modulo of the 590 counter to less than 8 bit?

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ocrdu
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HueChars
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2 Answers2

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You don't need to reset the 8-bit counter.

Simply use just Q0 and Q1 (or QA and QB, respectively) and ignore all other outputs. Since this counter counts from 0 to 255 and overflows to 0 again, these lowest two bits do exactly what you want.

the busybee
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This is a limitation of the 74HC590's design. It's a ripple counter internally, not a synchronous counter, and its reset is asynchronous.

As soon as your circuit reaches the maximum counter value, the 74HC590's internal ripple counter gets reset, but the output registers still keep the old value. At the next clock edge, the counting will be suppressed because the reset signal is still asserted. It only gets de-asserted after this clock edge (when the output registers are updated). Therefore, you get two zeros at the output.

If you need to reset the counter at a specific count, you should use a fully synchronous counter (with a synchronous reset), like the 74HC163. The '590 is just weird.

Jonathan S.
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  • Thanks a lot for the explanation! I thought before that the 163 was weird, and the 590 had easier control signals. Now I think they are both weird but I'm slowly getting there : ) In my circuit the double state is fine, but I would otherwise try ORing the inverted reset signal into the common clock, so to generate a 'fake' clock pulse (if was stuck with the 590). – HueChars Jul 24 '21 at 11:22
  • Trust me, the 590 is the weird one! ORing with the clock sadly won't work either, though, because the problem is that the low->high transition of the reset signal happens after the rising edge of the clock (due to the delay of the OR gate). This means that the 590 is still in reset during the clock edge and misses a count. – Jonathan S. Jul 24 '21 at 11:26