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I have designed a circuit to provide pulses with a slew rate of 3kV/50ns. The pulse train is made up of N successive pulses with duty cycles of 10us on 40 us off repeated at 2 Hz. My challenge is to find a track to track clearance rule to maintain my pulse integrity in copper.

HDware
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    what is the final voltage? –  Feb 26 '21 at 14:30
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    You talk about a slew rate of 3kV/50ns. Do you mean that the amplitude of your pulse is 3kV? Is not obvious – LDEG Feb 26 '21 at 14:32
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    Have you checked the specification of your PCB manufacturer? – jwh20 Feb 26 '21 at 14:44
  • I did find this paper: https://www.osti.gov/servlets/purl/6872407 – jwh20 Feb 26 '21 at 14:48
  • I have a sneaking suspicion we work for the same employer... Your problem is several folded: air clearance, creepage, trace inductance and potentially dielectric breakdown properties in inner layers (depending on your routing). Is your DC value so to say zero so that creepage isn't an issue? Is your source impedance low? Also, "10us on 40 us off repeated at 2 Hz." Wound' t that be 10 us on and 499990 us off? – winny Feb 26 '21 at 17:08
  • winny - no. It is a burst of an number (n) of pulses. Each pulse within the burst is 10/40 us. The bursts occur every 0.5 s, but the number of pulses in each burst can vary. – AnalogKid Feb 26 '21 at 17:38
  • What's your maximum number of pulses? – winny Feb 26 '21 at 18:28

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tl; dr: air gaps on PCBs are lousy HV insulators. That's what you're proposing by using PCB spacing.

Even if you find a clearance spec for your given PCB material, it’s difficult to control the performance of it using normal PCB manufacture. That's because you're relying on air as an insulator, which is influenced by environment (humidity, altitude) and the PCB insulation strength.

More here: http://pcb.iconnect007.media/index.php/article/53785/pcb101-fabricating-high-voltage-boards/53788/

What to do? Besides choosing an adequate board material, you can consider potting the traces on the board to achieve a strong enough dielectric. That can work, and it’s a technique used for things like CCFL drives that have multi-kV strike voltages.

If you're contemplating a long HV trace... that's a lot of of potting material. By the time you consider all that special process work needed, what you may discover is that it'll be more cost- and area-effective to use wires with adequate insulation strength, and then contain the board's HV problem to only the point from where you're launching your pulses.

hacktastical
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