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Can someone explain to me what simultaneous switching output noise is (SSO) is it the same thing as simultaneous switching noise (SSN)? from what I understand when lots of pins are switching together it affects current draw from the source and this is a problem for parallel loads. this also may be crude way of putting it, but are these the Vcc version of ground bounce?

Thanks.

user7538434
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When MORE THAN ONE logic output switches at the same time, the VDD and Ground rails of an MCU are upset.

This also applies to multiple-output logic devices such as buss drivers.

analogsystemsrf
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  • I see so it just takes more than one pin. sorry if it was a dumb question I just started studying this topic. I also wanted to ask about the crosstalk between two transmission lines. I read that once the reverse crosstalk hits a low impedance driver it's reflected back to the front end causing noise. Can we place an impedance match between the driver and the transmission line to avoid this? I'm unsure because I've only done impedance matching in RF applications. thanks for the help. – user7538434 Nov 18 '18 at 22:25
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    Not a dumb question. When driving 100pF with 5 volts in 5 nanosecond slewrate, that requires 100mA, which likely turned on in a couple nanoseconds, thus dI/dT per output is 100mA/2nS. If you have 8 outputs, that (you would like to see) 800mA/2nS. But with 5nanoHenry inductance in a VDD path to the external 0.1uF capacitor, the rail sag (using V = L * dI/dT) is 5nH * 0.8 amps / 2nanoSec, and the nanos cancel, leaving Vsag = 5 * 0.8 / 2 = 4/2 = 2 volts sag. Thus the 5volt rail became only 3 volts, and the output transistors are barely on, for several nanoseconds, causing bad delays. – analogsystemsrf Nov 18 '18 at 23:22