Vz + Vf must be << Vds max at a current starting at V+/DCR of coil. The energy absorbed with no secondary load must be absorbed by the Pd rating of the Zener for the duration of T=L/Zzt terminal resistance of the Zener.
The diode must be rated at well with the same current pulse but has a much lower Pd requirement.
If you are using a large power pulse and cannot find an adequate Zener then other methods of clamping must be used to protect the NFET such as devices with built in Avalanche diode and higher V rating and in a different config.
https://www.vishay.com/docs/90160/an1005.pdf