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I need to configure the CAN module of a STM32F207 to the following different baud rates: 500 kbit/s, 600 kbit/s, 700 kbit/s, and 1 Mbit/s. For 500 kbit/s and 1 Mbit/s I am able to get exact integer values for the following registers.

  • Prescaler = 2 (CAN Controller's clocked @ 30 MHz)
  • BS1 Timequanta = 8
  • BS2 Timequanta = 6

But when I do the calculation for 600 kbit/s, I am not able to get integer values for the above mentioned registers.

Is it not possible to arrive at the exact register values for the baud rates 600 kbit/s, 700 kbit/s, etc.?

Michel Keijzers
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Vivek V
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    Before Configuring to such odd baudrates make sure that Other devices on the bus are of this baud. Otherwise you will end up generating Error frames. – Swanand Jun 20 '12 at 09:10
  • Try this bit timing calculator It worked for me: http://www.bittiming.can-wiki.info/ – Tjaart van aswegen Jan 06 '19 at 23:11

2 Answers2

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I have never heard of CAN going at 600Kbps. But can we work this out?

With a 30MHz clock, divided by 2, how many Tq do we need to achieve 600kbps?

15,000,000 / 600,000 = 25Tq

So, we use 1 Tq for the start bit, then we have to divide 24 Tq among BS1 and BS2. How about 14 and 10?

Rocketmagnet
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  • For many more gory details on CAN bit timing, read here: http://cache.freescale.com/files/microcontrollers/doc/app_note/AN1798.pdf and here if you have access: http://papers.sae.org/970295/ – Martin Thompson Jun 20 '12 at 11:53
  • I think this could work out for 600 Kbps, but with respect to STM32F207, we will be able to achieve 24 Tq as BS1=16,BS2=8, which are the maximum supported values for BS1 and BS2. – Vivek V Jun 20 '12 at 13:18
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With a Baud rate of 600 kbit/s, you have a nominal bit time of 1.67 μS.

The nominal bit time is divided into three segments: SYNC_SEG, BS1, and BS2.

  • SYNC_SEG = Tq = (BRP[9:0] + 1) x Tpclk
  • BS1 = Tq x (TS1[3:0] + 1)
  • BS2 = Tq x (TS2[3:0] + 1)

A 30 MHz CAN clock gives us Tpclk of 33.33 ns.

1.67 μS / 33.33 nS gives us almost exactly 50 clock ticks per bit time. A good rule of thumb is to have your sampling point at 70-80% of the nominal bit time. More towards 80% the higher the baud rate. So let's set BRP[9:0] to 4 which gives us:

Tq = (4 + 1) x 33.33 ns = 166.65 ns

So now Tq is 1/10th of nominal bit time and gives us easy numbers to work with. For an 80% sampling point:

  • SYNC_SEG = 1 Tq = BRP[9:0] of 4
  • BS1 = 7 Tq = TS1[3:0] of 6
  • BS2 = 2 Tq = TS2[3:0] of 1

A Word of Warning:

I strongly recommend against running at 1 Mbit/s. I had a project where the customer specified the system to run at 1 Mbit/s and it caused no end of headaches. And it was completely unnecessary as we were only sending one message every 500 ms.

We played with everything. Different transceiver chips, termination schemes, board layout, slew rates, sampling points, common mode filters, etc. It was a nightmare. And not only for us. Every subsystem had issues communicating. After four years of begging and pleading for a lower baud rate, they finally dropped it to a more standard 125 kbit/s.

If you have any control over what baud rate is chosen, lower is better. If it is a customer specification, tell them as often as you can that it's a bad idea.

Peter Mortensen
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embedded.kyle
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