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When I study frequency responce of amplifiers, I must understand if capacitors are in serie, parallel etc. relative to input small signal (in my exercises there is always only one input small signal). So far I learned that:

  1. a capacitor in parallel to the input small signal introduces an infinite zero and a finite pole;

  2. a capacitor in serie to the input small signal introduces a finite zero (equal or not equal to 0) and a finite pole;

  3. a capacitor in other configuration introduces a finite zero and an infinite pole? Is this third point right?

For example, if I consider the following circuit:

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the capacitor C2 is in parallel to the input small signal, in fact for w=infinity the vu=0. Is the capacitor C1 not in serie or parallel (for w=infinity --> vu is not 0; for w=0 the vu is not 0)?

Thank you in advance.

Gennaro Arguzzi
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1 Answers1

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I'd rather avoid having too many rules to remember:

in all the cases you mention what you have to do is ask yourself : "How can I get no output at all?" The answer will be your zeros location.

Take R1, C1, not to have any output they should be an open circuit, or equivalently their parallel admitance has to be zero:

$$Y(s_\text{z})=\frac{1}{R_1}+s_\text{z} C_1=0 \quad\Rightarrow \quad s_\text{z}=-\frac{1}{R_1C_1}$$

which is a finite zero in LHP as expected

If apply the same at R3 C2 you'll find that you need a short circuit to have no output and hence \$\omega\rightarrow\infty\$

As far as poles are concerned just apply "seen resistance rule" if they are separated or do the math in other cases.

E.g. as far as R1 and C1 are concerned, if you hold true ideal operational and hence virtual ground at its inverting input, you have C1 shorted (voltage generator on left node, virtual ground at right one), so $$\omega_\text{p}=\lim_{R\rightarrow 0}\,\frac{1}{RC_1}=\infty$$

carloc
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