why a capacitor behaves as an open circuit when \$\omega<\omega_p\$ and as a short circuit when \$\omega>\omega_p\$ (where \$\omega_p=1/RC\$ is a pole)? My question is generic.
Thank you for your time.
why a capacitor behaves as an open circuit when \$\omega<\omega_p\$ and as a short circuit when \$\omega>\omega_p\$ (where \$\omega_p=1/RC\$ is a pole)? My question is generic.
Thank you for your time.
why a capacitor behaves as an open circuit when \$\omega<\omega_p\$ and as a short circuit when \$\omega>\omega_p\$ (where \$\omega_p=1/RC\$ is a pole)?
It doesn't.
Q=CV and differentiating to obtain current we get I = C dv/dt. Basically the current that flows is proportional to the rate of change of voltage. It's as simple as that.
To understand the complex impedance of the capacitor, we have to think about what happens in the capacitor if we apply a sinusoidal voltage \$ u_c = U * sin(\omega t) \$. The current will be, by definition:
$$ i_c = C * \frac{du_c}{dt} $$
now we can derive from \$u_c\$:
$$ \frac{du_c}{dt} = U * \omega * cos(\omega t) $$
The impedance is the quotient of voltage and current, so if we put in everything we have:
$$ Z = \frac{u_c}{i_c} = \frac{U * sin(\omega t)}{C * U * \omega * cos(\omega t)} = \frac{1}{\omega C} * \frac{sin(\omega t)}{cos(\omega t)} $$
We can interpret this as the impedance consisting of a 90° phase shift (cos to sin) and an amplitude limiting factor \$\frac{1}{\omega C} \$. This will often be written in exponential form as \$ Z_C = \frac{1}{j \omega C} \$, where \$ \frac{1}{j}\$ is the 90° phase shift.
From the simple formula for Z, we can observe the extreme values at \$ \omega \to 0 \$ and \$ \omega \to +\infty \$
$$ \lim_{\omega \to +\infty} \frac{1}{\omega C} = 0 $$
As you can see, the impedance at an infinite \$\omega\$ is 0, which is a short circuit. It also works the other around if we set \$\omega\$ to 0:
$$ \lim_{\omega \to 0} \frac{1}{\omega C} = +\infty$$ .
An infinite impedance means an open circuit. We can remember this by thinking of how capacitors are often used to block DC (\$\omega = 0\$) in circuits, while passing higher frequencies without much attenuation.
Everything in between 0 and \$\infty\$ will present a capacitive load.

simulate this circuit – Schematic created using CircuitLab
$$ V_o = V_i(\frac{Z_C}{Z_C + R}) \Rightarrow H(\omega) = \frac{1/j\omega C}{R+(1/j\omega C)}\\ \Rightarrow H(\omega)=\frac{1}{1+j\omega RC} $$ Thus \$ \omega_p = 1/RC \$.
Also \$ \Rightarrow |H(\omega)| = \frac{1}{\sqrt{1+(\omega RC)^2}} \$
As \$\omega >> \omega_p \$ (not \$ \omega>\omega _p\$), \$(1+(\omega RC)^2) \rightarrow \infty \$ thus \$ |H(\omega)| \rightarrow 0\$ ........ (1)
Likewise, as \$\omega << \omega_p \$ (not \$ \omega<\omega _p\$), \$\omega RC \rightarrow 0\$ thus \$ |H(\omega)| \rightarrow 1\$ ........ (2)
From (1), if output (\$V_o\$) goes to 0 then \$|X_C|\$ should be 0 (i.e. short circuit) because R does not change with frequency.
From (2), if output (\$V_o\$) follows input (\$V_i\$) then \$|X_C|\$ should be infinity (i.e. open) because zero current flows due to total "infinite" resistance.
P.S. Sorry for bad English.