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schematic

simulate this circuit – Schematic created using CircuitLab

I have an application where 400'-450' of 14 AWG solid core cable was buried to connect a flow meter to a shed. I built this circuit to count the pulses, but I occasionally get long episodes of false pulses reporting. When I was able to catch this in the act, the scope showed noise with a max voltage of 9 VDC and a min of -1.2. The resonance lasted for a about 100 micro seconds. I wish my scope wasn't so old, I'd love to export the image and share it. I placed a 0.043 uF capacitor in parallel with the 100 pF, but it seems that it only increased the rise time and did not seem to address the noise issue.

I used the switch symbol to represent the pulse meter. The net that starts between R2 and C1 and ends at the switch represents the 400' 14 AWG solid core cable. The return ground conductor has the same characteristics. Is there a way to filter out this noise without washing out legitimate pulse signals, or should I give up and start digging?

Justin Manuel
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    Was it a single conductor relying on crappy earth/ground return as implied in your diagram? – Andy aka May 18 '16 at 16:42
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    Thanks for the schematic but it shows two 5 V supplies, a 3.3 V supply, some resistors, the capacitor and no counter input. You need to indicate where the long cable is. Is SW1 the contact in the meter? Is it really grounded at the meter or does the ground come back to the counter (in which case you should draw it that way. Edit the schematic. – Transistor May 18 '16 at 16:42
  • Thanks @transistor. There is only one 5V supply. The node labeled 5V output is the pulse going to a transceiver and 3.3V output is going to an ADC on an MCU. – Justin Manuel May 18 '16 at 16:49
  • Andy, there is a conductor to go to the flow meter and another one to return to the ground on the board itself. The circuit is only connected to the earth ground at the pulse meter. – Justin Manuel May 18 '16 at 16:53
  • (1) Why are you feeding two counter inputs, 5 V and 3.3 V? (2) Why are you using an ADC input for a digital pulse? (3) What's the pulse duration and frequency? – Transistor May 18 '16 at 17:07
  • (1) The 5V output is actually doing the pulse counting. The 3.3V volt output is so the terminal input could double as an analog sensor input in certain applications but is never used. I included that part of that circuit because I thought it may be relevant. – Justin Manuel May 18 '16 at 17:14
  • (2) The signal may not be a digital pulse in other applications. – Justin Manuel May 18 '16 at 17:19
  • (3) The duty cycle appears to be roughly 50% with a maximum of around 4 Hz – Justin Manuel May 18 '16 at 17:28

2 Answers2

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schematic

simulate this circuit – Schematic created using CircuitLab

Figure 1. Reorganised component layout.

I would be inclined to move R2 to form a low-pass filter with C1. The circuit isn't great, however, as you're having to compromise the filter with the pull-up (R1) which, with R3 and R4, loads the filter.

schematic

simulate this circuit

Figure 2. Opto-isolated circuit.

The circuit of Figure 2 has the advantage that you can optimise the LED / pulse switch circuit for noise immunity separately from the logic circuit (which still needs a tidy-up). R2 / D1 form a low-impedance circuit and it is very unlikely that your noise will have enough energy to light the LED. Q1 does the pull-down for the logic.

Replace 400' of cable or try an opto-isolator? I know where I'd start.

If you don't have an opto-isolator to hand you might be able to make one: Is it possible to use an optointerrupter as a optoisolator?

Community
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Transistor
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  • This is great but could you elaborate on the comment "the logic circuit still needs a tidy-up". – Justin Manuel May 18 '16 at 17:45
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    Normally a pull-up is pulling against an open circuit. In your case it's pulling up against the voltage divider R3 / R4. This means that you never quite get full voltage on your digital in. It will probably work fine due to the (usually) high-level logic threshold of about half-supply but it's a little inelegant. – Transistor May 18 '16 at 17:50
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If you're using a mechanical switch, I would suggest that you design your circuit so that when the switch seems to be open, the amount of current required to make it read "closed" is much greater than the amount of current required to make it continue to read closed. It's not uncommon for some kinds of mechanical switch to have a resistance that can bounce up and down repeatedly by a couple orders of magnitude during actuation. Requiring that the switch shunt a 10mA source to 0.5V (implying a max resistance of 50 ohms) to read as "closed", but then continuing to regard it closed until it allows a 50uA source to pull the switch to 2.5V (implying a minimum resistance of 50K) should ensure reliable counting under even adverse conditions.

Alternatively, if you have a double-throw contact, you could use something like this:

schematic

simulate this circuit – Schematic created using CircuitLab

Such a circuit will only switch state once each time the switch moves from one set of contacts to the other; during any time when the switch is between contacts, it will remain in its previous state. C1 will help ensure that if the switch conducts well enough that the output of BUF1 starts to change, starts to switch, it will switch fully and will only switch back if the switch can conduct current in the reverse direction. R1, R3, and R4 serve mainly to protect the gates from ESD or other nastiness; R2 sets the amount of current the switch must conduct to make the device change state, and C1 controls how long the switch must be in that changed position for the output to switch as well as how resistant the circuit will be to capacitance in the cable.

supercat
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