My book simply states this without any kind of explanation.
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2For reference, what book? – JYelton Apr 03 '14 at 21:59
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Irwin's Basic Engineering Circuit Analysis. I wouldn't think it would matter though, since every resource I've read (and I checked out several) simple state it without an explanation. – dfg Apr 03 '14 at 22:12
4 Answers
The basic pedestrian answer goes like this:
All you have in analyzing a network of simple components is KCL and KVL. If you write out all KCL and KVL equations, you (or a computer) can solve the circuit. (Assuming no impossible conditions, like a voltage source across a short circuit, or current source into an open circuit).
However, proceeding that way, with no other aid, is tedious and error prone, as it's extremely difficult to keep track of all the current and voltage directions.
So, as an accounting convenience, mesh analysis introduces the notion of "current loops". Each current loop is not a distinct phenomenon that can be individually observed. They are simply an "accounting breakdown", and they directly follow from KCL. But their great benefit is that they establish a rigorous convention for accounting for direction at every point in the network. Note: not the actual direction of current or voltage, but merely the direction to be counted as the "+" direction. If the actual direction turns out to be the other way, then account for it as negative.
But this "mesh"/"current-loops" accounting breakdown of KCL and KVL is only valid if our accounting method correctly totals the current on each wire attached to each node -- not omitting some portion of that current, and not double-counting some portion of that current. The customary way to accomplish this is to focus only on innermost loops. (An innermost loop is one with no other wiring or component drawn within it.) For example, we don't add additional loops for every possible closed path through the network! We rely on "only count all innermost loop currents" as the criterion for ensuring that we are only counting currents that exactly add up to what KCL expects.
But there are some networks in which we can't uniquely identify "innermost-loops". These are the so-called "non-planar" circuits, ones that can't be drawn on flat paper without crossovers. In that topology, KCL and KVL still work, of course. But for some parts of the network we find candidate loops that also have one end of an additional branch that passes through the interior of that loop. Whether we either include or exclude that loop in a loop analysis, the totals wouldn't add up properly to what KCL requires. We can therefore not use "count all innermost loops" as the basis of complying with KCL at all nodes. Consequently, the accounting simplification of (innermost) loop currents can't be used with non-planar circuits.
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Returning to this answer after almost a year because I got notified that someone voted it back up to zero. (Thanks!) I continue to like this answer -- good job, me from the past! – gwideman Mar 27 '15 at 01:25
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4 and 5 are wrong. If you assign a current to every possible path and solve the circuit, you'll get a correct answer. Always. The reason we don't do so is because you'll end up with infinite solutions (all correct). – FrancoVS Dec 06 '16 at 14:32
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@FrancoVS Are you saying you would solve the circuit by assigning a current variable to every possible loop (innermost or not), or are you simply saying that you can assign a current to each path (node-to-node segment), (and a voltage difference between each adjacent node), and then solve the resulting system of equations? – gwideman Dec 07 '16 at 14:18
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I'm saying you can solve a circuit by assigning a current variable to every possible loop. I'd probably never do this in a complex enough circuit because it would be an algebraic mess, but yes, you can, and the solutions would be correct. What I'd actually do in a nonplanar circuit (planar circuit are trivial, use the "window pane" method) is try to eyeball the minimum amount of necessary loops in order to get a unique solution. If I can't (eyeballing this can be hard), I'd give up and do the node voltage method. – FrancoVS Dec 12 '16 at 12:58
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To clarify for other readers: I believe you're not disagreeing with the points (slightly reworded) that I made regarding the innermost-loop strategy of mesh theory, right? The point to the method is it's tractable to do it by hand (well, with a calculator). So descriptions of the method come with the proviso that it can't be applied to non-planar circuits (which is the core of the OP's question.), rather than a discussion of much more complicated methods that are generally impractical by hand. Obviously it's always possible to solve a circuit with sufficient equations and a computer. – gwideman Dec 13 '16 at 02:34
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Well, "Whether we either include or exclude that loop in a loop analysis, the totals wouldn't add up properly to what KCL requires" is still outright wrong. If you just include those extra loop currents in the KVL equations (like you already do for the branches with two loop currents), you get valid answers. No "double counting" involved. – FrancoVS Dec 13 '16 at 11:50
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1I see your point. If we don't include at least one loop for each of the non-planar branches, then we have an accounting problem: KCL at the nodes on the non-planar paths isn't satisfied, for example. However, if we do include a loop for each non-planar branch, then the accounting will be good, but the additional currents on some paths makes the bookkeepping more challenging. If we incorrectly transcribe a loop's id or current direction into equations, then the KCL and KVL will be wrong. I'll revise my answer to clear that up. – gwideman Dec 14 '16 at 20:51
My old Uni copy of Network Analysis (Van Valkenburg) goes on for a chapter or three building the mathematical (topological) background, touching on Euler's solution of the Konigsberg bridge problem in 1735 and Kirchhoff in 1947 and Listing.
What they call the "window pane" method allows the essential meshes to be identified by inspection- loops without internal loops, and essential branches are branches that don't cross other branches.
If it's not planar, you can't draw it as so, so they suggest you should employ what they call the "tree and chord set" method to analyze the circuit.
You could probably get a rigorous mathematical proof based on graph theory, but not from moi.
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I think that the reason is in terms of definitions, so that the method can be specified in such a way that it is easy to apply.
If the circuit is not planar, then the "3-D" branches don't have clearly definable meshes, since in 3-D you can't talk about "loops that don't have inner loops". The loop that contains the components in the 3-D branches can have many paths, and is not unambiguous like in planar circuits.
It is also not possible anymore to have each component only have 2 or 1 meshes (it can have more), and it is not possible to have an easy to follow convention for loop current direction.
All these complications I think made it worth limiting the mesh analysis to 2-D, and leave the "loop analysis" with its "loop currents" as a more general method. In that method you define the loops in a more general way, as long as every component is contained inside at least one loop. Same thing, just more difficult to keep track of, but equally valid.
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I think this agrees with the discussion in Appendix C of Electric Circuit Analysis. The authors introduce basic network graph theory and prove that nodal analysis/basic loop analysis are sufficient to solve a circuit. They then go on to define mesh analysis: "Meshes are defined only for planar networks, those networks whose graphs can be drawn on a plane without any branches crossing. A mesh is defined as an empty closed loop in a planar network graph, that is, a loop containing no branches inside it." – qce88 Apr 18 '14 at 15:57
I think the Spehro gives about as a complete answer one can hope for without a foray into the homology of CW complexes.
I just wanted to add an example so you can see how planar is subtly used in mesh analysis. Take a voltage source \$V\$ and two resistors \$R_1\$ and \$R_2\$ connected all in parallel but not in the plane but in three space.
You will notice there is a symmetry now and you naturally have three loops. One loop of current through \$R_1\$ and the voltage source \$V\$ (call it \$i_1\$), one loop through \$R_2\$ and the voltage source \$V\$ (call it \$i_2\$), and a latter between the two resistors (call it \$i_3\$).
Now there are six ways to lay this circuit out in the plane (where the voltage source is oriented positively). A mesh analysis on any one of these embeddings will use two of the three loops. Moreover, for any choice of two of the three loops, there is a circuit lay out whose mesh analysis will use those two loops.
Notice that you cannot use all three loops in a mesh analysis because you get the set of equations $$V = R_1 (i_1 - i_3)$$ $$V = R_2 (i_2 + i_3)$$ $$0 = R_1(i_1-i_3) - R_2(i_2+i_3)$$
which has many solutions, but not a unique one.
Hopefully you can at least now believe that being planar involves a choice of which loops to use.
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