Computer Architecture Lab/SS2014/DE0 nano pinmap
< Computer Architecture Lab < SS2014
DE0-nano pinmap
| Board pin name | FPGA pin name |
|---|---|
| CLOCK_50 | R8 |
| KEY0 | J15 |
| KEY1 | E1 |
| LED0 | A15 |
| LED1 | A13 |
| LED2 | B13 |
| LED3 | A11 |
| LED4 | D1 |
| LED5 | F3 |
| LED6 | B1 |
| LED7 | L3 |
| SW0 | M1 |
| SW1 | T8 |
| SW2 | B9 |
| SW3 | M15 |
Also see: https://sites.google.com/site/fpgaandco/de0-nano-pinout for pictorial layout of GPIOs/A/Dc